EE245 Digital Design
Spring 2005



Lecture: Tuesdays 6:30pm - 9:30pm, Laboratory Thursday Evenings


Bannow Hall TBD


Jeffrey N. Denenberg


(203) 268-1021


(440) 860-4705




Home Page: or


EE213 Circuit Analysis 1 (or equivalent)


EE245L Digital Design Laboratory (Thursday Evenings)

Office Hours:

McAuliffe 2nd 5:00 pm - 6:00 pm Tuesdays
Contact me via Phone, Fax or Email at any reasonable time.


Mano, M. Morris and Kine Logic and Computer Digital Design Fundamentals 3rd edition, Prentice-Hall 2004, ISBN 0-13-167849-3 (with version 6.3 CD's)


LogicWorks 4, Capilano Computing Systems Ltd., Addison Wesley 1999,
ISBN 0-201-44488-7,

Xilinx or



Mano, M. Morris Digital Design 3rd edition, Prentice-Hall 2002, ISBN 0-13-062121-8

Wakerly, John F. Digital Design: Principles & Practices 3rd edition updated,
Prentice-Hall 2001

Rafiquzzaman, M. Fundamentals of Digital Logic and Microcomputer Design 3rd edition, Rafi Systems, Inc. 2000

Course Covers:

Topics in this foundation course include basic digital design principles: Boolean algebra, combinational logic design with gates, large scale integration, sequential logic design, registers, counters, memory, and programmable logic devices. Students learn to write, implement, and simulate elementary digital circuits. The course culminates by enabling students to design and implement finite-state machines. (3 credits)

This is an in-class lecture course that is "simulcast" onto the internet using the iLinc distance education facility at Fairfield University. This makes it available to remote students. For further information on this course via remote access see: EE245-iLinc, email DoctorD, or call the Fairfield University Engineering office at:
(203) 254-4147.





To understand the concepts of number systems and codes

Students will convert numbers from one base to another and will learn the basis for computer codes to designate numbers and letters.



To understand basic combinational logic circuits and how they are interconnected to perform logic functions

Students will be able to analyze and design combinational logic circuits directly from logic functions using Boolean algebra theorems and logic mapping.



To understand basic sequential logic circuits and how they are interconnected to perform logic functions

Students will learn Boolean algebra and will be able to analyze and design sequential logic circuits directly from logic functions using Boolean algebra theorems and logic mapping.



To understand the concepts and design of digital systems

Students will design simple digital computers


Schedule - Spring 2005 (Updated periodically so check regularly)

Supplementary Materials:

       Figures from Mano, "Digital Design", 3rd Ed.: (PPT & PDF) Thanks to Dr. Mano and Prentice-Hall

       Digital Logic Tutorial Thanks to Ken Bigelow, the originals are at

       Boolean Algebra Postulates and Theorems

       Interactive Karnaugh Map Applet (Java) Thanks to Michael Keppler (German/English) The Original in Germany

Laboratories: (available as scheduled)

Class Performance Summary: Spring 2005-When Available

Class Contact List: You need a UserID and PassWord
copy this link and use an FTP client for more reliable access


40% Examinations (3 exams- lowest grade may be discounted, but not ignored)
40% Final Exam
20% Homework and Class Participation

There will be no make-up examinations. If you are unable to take one of the mid-term examinations on the assigned date, let me know in advance to make alternative arrangements. If you are unable to take the final examination on the assigned date, then the instructor will record a course grade of incomplete which can be redeemed by taking the final examination when the course is next offered (usually less than 1 year later).

In case of a class cancellation, use U.S. mail, e-mail, fax, or hand delivery to send in the homework assignment by the Friday following the due date. The activity scheduled for a cancelled meeting date, whether exam or lecture, is automatically postponed to the next class meeting when it is eventually held. After a cancellation, a new tentative schedule will be issued.

Late homework will be penalized 1 point/day, up to a maximum penalty of 5 points. All assignments must be turned in before the final exam to receive credit. Each reading assignment should be completed before the weekly meeting, in preparation for a pop quiz. Homework is due at the meeting following the week when it is assigned.

You MUST NOT give, receive, lend, copy or borrow solutions to assignments.