3937899 Claims

3937899 : Tone detector using spectrum parameter estimation

What is claimed is:

1. A tone detector comprising:

an input terminal for receiving an input signal;

a plurality of estimating means each comprising:

an input connected to said input terminal; an output; and

means for generating at said estimating means output an estimate of a parameter of the frequency spectrum of said input signal;

one or more decision circuits, each decision circuit comprising:

a plurality of inputs each connected to a respective one of said plurality of estimating means outputs;

an output; and

a plurality of comparison circuits, each comparison circuit corresponding to one of said plurality of estimating means and comprising:

an input connected to the one of said decision circuit inputs connected to the corresponding estimating means;

an output; and

means for generating at said comparison circuit output a first signal if the signal present on said input of said comparison means is essentially equal to the value of the corresponding parameter of a tone to be detected and a second signal in the absence of equality; and

means for generating at said decision circuit output a third signal if all of said outputs of said plurality of comparison circuits have a first signal present and a fourth signal if one or more of said outputs of said plurality of comparison circuits has a second signal present; and

one or more output terminals, each connected to a corresponding decision circuit output for indicating the presence or absence of a predetermined tone whose presence is to be detected.

2. A tone detector according to claim 1 wherein said plurality of estimating means comprises:

a total power estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said total power estimating means output an estimate of the total power of said input signal;

a power mean frequency estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said power mean frequency estimating means output an estimate of the power mean frequency of said input signal; and

a mean square power bandwidth estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said mean square power bandwidth estimating means output an estimate of the mean square power bandwidth of said input signal.

3. A tone detector according to claim 2 wherein said plurality of comparison circuits comprises:

a total power comparison circuit comprising:

an input connected to said output of said total power estimating means;

an output; and

means for generating at said total power comparison circuit output a first signal when said output of said total power estimating means is equal within predefined limtis to the total power of a tone or combination of tones to be detected and a second signal in the absence of equality;

a power mean frequency comparison circuit comprising:

an input connected to said output of said power mean frequency estimating means;

an output; and

means for generating at said power mean frequency comparison circuit output a first signal when said output of said power mean frequency estimating means is equal within predefined limits to the power mean frequency of a tone or combination of tones to be detected and a second signal in the absence of equality; and

a mean square power bandwidth comparison circuit comprising:

an input connected to said output of said mean square power bandwidth estimating means;

an output; and

means for generating at said mean square power bandwidth comparison circuit output a first signal when said output of said mean square power bandwidth estimating means is equal within predefined limits to the mean square power bandwidth of a tone or combination of tones to be detected and a second signal in the absence of equality.

4. A tone detector according to claim 3 wherein said plurality of estimating means further comprises:

a guard power estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said guard power estimating mean output an estimate of the power of said input signal within a predetermined frequency range; and

predefined ones of said decision circuit comprising said plurality of comparison circuits further comprises:

a guard power comparison circuit comprising:

an input connected to said output of said guard power estimating means;

an output; and

means for generating at said guard power comparison circuit output a first signal when said output of said guard power estimating means is less than a predefined limit and a second signal when said output of said guard power estimating means is equal to or greater than said predefined limits.

5. A tone detector according to claim 1 wherein said plurality of estimating means comprises:

a first total power estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said first total power estimating means output an estimate of the total power of a first set of frequencies of said input signal;

a first power mean frequency estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said first power mean frequency estimating means output an estimate of the power mean frequency of a first set of frequencies of said input signal;

a first mean square power bandwidth estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said first mean square power bandwidth estimating means output an estimate of the mean square power bandwidth of a first set of frequencies of said input signal;

a second total power estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said second total power estimating means output an estimate of the total power of a second set of frequencies of said input signal;

a second power mean frequency estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said second power mean frequency estimating means output an estimate of the power mean frequency of a second set of frequencies of said input signal;

a second mean square power bandwidth estimating means comprising:

an input connected to said input terminal;

an output; and

means for generating at said second mean square power bandwidth estimating means output an estimate of the mean square power bandwidth of a second set of frequencies of said input signal.

6. A tone detector comprising:

an input terminal for receiving an input signal;

first means connected to said input terminal for generating output signals defining the total power of signals received from said input terminal and comprising an output terminal;

second means connected to said input terminal for generating output signals defining the power mean frequency of said signals received from said input terminal and comprising an output terminal;

third means connected to said input terminal for generating output signals defining the mean square power bandwidth of said signals received from said input terminal and comprising an output terminal;

a first comparison circuit comprising:

an input connected to said output of said first means;

an output; and

means for generating at said output a first signal when said output of said first means is equal within predefined limits to predefined characteristics of a signal to be detected and a second signal in the absence of equality;

a second comparison circuit comprising:

an input connected to said output of said second means;

an output; and

means for generating at said output said first signal when said output of said second means is equal within predefined limits to predefined characteristics of said signal to be detected and said second signal in the absence of equality;

a third comparison circuit comprising:

an input connected to said output of said third means;

an output; and

means for generating at said output said first signal when said output of said third means is equal within predefined limits to predefined characteristics of said signal to be detected and said second signal in the absence of equality; and

a decision circuit comprising:

first, second, and third inputs connected respectively to said outputs of said first, second, and third comparison circuits;

an output; and

means for generating at said output said first signal when said outputs of said first, second, and third comparison circuits present said first signal and said second signal when said first, second, and third comparison circuits do not all present said first signal.

7. A tone detector comprising:

an input terminal for receiving an input signal of the form

_i

means for generating a reference signal at a frequency .omega._o where .omega._o is the frequency of a tone desired to be detected;

first quadrature component generating means connected to said input terminal for generating output signals defining the Cosine quadrature component .alpha.(t) of said input signal according to the relationship

_i

_o

a second quadrature component generating means connected to said input terminal for generating output signals defining the Sine quadrature component .beta.(t) of said input signal according to the relationship:

_i

_o

a first spectrum parameter estimating means comprising:

a first input connected to said output of said first means for generating quadrature components and a second input connected to said output of said second means for generating quadrature components;

means for generating output signals defining an estimate of the total power P of said input signal over a time T according to the relationship: [Figure] and an output terminal; a second spectrum parameter estimating means comprising:

a first input connected to said output of said first means for generating quadrature components and a second input connected to said output of said second means for generating quadrature components;

means for generating output signals defining an estimate of the power mean frequency .omega._d of said input signal over a time T according to the relationship: [Figure] where .beta. (t) is the first derivative of .beta. (t) and .alpha. (t) is the first derivative of .alpha. (t) and an output terminal;

a third spectrum parameter estimating means comprising:

a first input connected to said output of said first means for generating quadrature components and a second input connected to said output of said second means for generating quadrature components;

means for generating output signals defining an estimate of the power bandwidth B² of said input signal over a time T according to the relationship: [Figure] and an output terminal; a first comparison circuit comprising:

an input connected to said output of said first spectrum parameter estimating means;

an output; and

means for generating at said output a first signal when said output of said first spectrum parameter estimating means is equal within predefined limits to predefined characteristics of a signal to be detected and a second signal in the absence of equality;

a second comparison circuit comprising:

an input connected to said output of said second spectrum parameter estimating means;

an output; and

means for generating at said output said first signal when said output of said second spectrum parameter estimating means is equal within predefined limits to predefined characteristics of said signal to be detected and said second signal in the absence of equality;

a third comparison circuit comprising:

an input connected to said output of said third spectrum parameter estimating means;

an output; and

means for generating at said output said first signal when said output of said third spectrum parameter estimating means is equal within predefined limits to predefined characteristics of said signal to be detected and said second signal in the absence of equality; and

a decision circuit comprising:

first, second, and third inputs connected respectively to said outputs of said first, second, and third comparison circuits;

an output; and

means for generating at said output a third signal when said outputs of said first, second, and third comparison circuits present said first signal and a fourth signal when said first, second, and third comparison circuits do not all present said first signal.

8. A tone detector comprising:

an input terminal for receiving an input signal;

a local oscillator for generating signals corresponding to the Sine and the Cosine of a predetermined frequency;

a first multiplier circuit comprising:

a first input connected to said input terminal;

a second input connected to said Cosine output of said local oscillator;

an output; and

means for generating an output signal corresponding to the product of said first and said second inputs and said first multiplier output signal comprising a first component corresponding to the sum of the frequency of said input signal and the frequency of said local oscillator and a second component corresponding to the difference between the frequency of said input signal and the frequency of said local oscillator;

a first low pass filter comprising:

an input connected to said output of said first multiplier;

an output; and

means for removing said component of said first multiplier output signal corresponding to the sum of said input frequency and said local oscillator frequency;

a first differentiator circuit comprising:

an input connected to said output of said first low pass filter;

an output; and

means for generating a signal corresponding to the derivative of said signal present at said input of said first differentiator circuit;

a second multiplier circuit comprising:

a first input connected to said input terminal;

a second input connected to said Sine output of said local oscillator;

an output; and

means for generating an output signal corresponding to the product of said first and said second inputs and said second multiplier output signal comprising a first component corresponding to the sum of the frequency of said input signal and the frequency of said local oscillator and a second component whose frequency corresponds to the difference between the frequency of said input signal and the frequency of said local oscillator;

a second low pass filter comprising:

an input connected to said output of said second multiplier;

an output; and

means for removing said component of said second multiplier output signal corresponding to the sum of said input frequency and said local oscillator frequency;

a second differentiator circuit comprising:

an input connected to said output of said second low pass filter;

an output; and

means for generating a signal corresponding to the derivative of said signal at said input of said second differentiator circuit;

a power frequency product circuit comprising:

a first input connected to said output of said first differentiator circuit;

a second input connected to said output of said second low pass filter circuit;

a third input connected to said output of said first low pass filter;

a fourth input connected to said output of said second differentiator;

an output; and

means for generating an output signal corresponding to the product of the power of said input signal and the difference between the frequency of said input signal and the frequency of said local oscillator signal;

a first integrator comprising:

an input connected to said output of said power frequency product circuit;

an output; and

means for generating a signal at said output of said first integrator corresponding to the average power frequency product over a predetermined period of time;

a power circuit comprising:

a first input connected to said output of said first low pass filter;

a second input connected to said output of said second low pass filter;

an output; and

means for generating a signal at said output of said power circuit corresponding to the total power of said input signal;

a second integrator comprising:

an input connected to said output of said power circuit;

an output; and

means for generating a signal at said output of said second integrator circuit corresponding to the average total power of said input signal over a predetermined time interval;

a first divider circuit comprising:

a dividend input connected to said output of said first integrator circuit;

a divisor input connected to said output of said second integrator circuit;

an output; and

means for generating a signal at said first divider output corresponding to said output of said first integrator divided by said output of said second integrator;

a bandwidth circuit comprising:

a first input connected to said output of said first differentiator;

a second input connected to said output of said second differentiator;

an output; and

means for generating at said output a signal corresponding to an estimate of the total power of said input signal times the sum of the mean square bandwidth of said input signal and the power means frequency squared of said input signal;

a third integrator comprising:

an input connected to said output of said bandwidth circuit;

an output; and

means for generating at said output of said integrator circuit a signal corresponding to the average of said output of said bandwidth circuit over a predetermined time interval;

a second divider circuit comprising:

a dividend input connected to said output of said third integrator;

a divisor input connected to said output of said second integrator;

an output; and

means for generating at said output of said second divider circuit a signal corresponding to said output of said third integrator divided by said output of said second integrator;

a third multiplier circuit comprising:

a first input connected to said output of said first divider;

a second input connected to said output of said first divider;

an output; and

means for generating at said output a signal corresponding to the mathematical square of said output of said first divider;

a subtractor circuit comprising:

a minuend input connected to said output of said second divider circuit;

a subtrahend input connected to said output of said third multiplier circuit;

an output; and

means for generating at said output of said subtractor a signal corresponding to said output of said second divider circuit minus said output of said third multiplier circuit;

a first comparison circuit comprising:

an input connected to said output of said second integrator circuit;

an output; and

means for generating at said output of said first comparison circuit a first signal if said output of said second integrator circuit is within predetermined limits and a second signal if said input of said output of said second integrator circuit is not within predetermined limits;

a second comparison circuit comprising:

an input connected to said output of said first divider;

an output; and

means for generating at said output of said second comparison circuit a first signal if said input of said second comparison circuit is within predetermined limits and a second signal if said input of said second comparison circuit is not within predetermined limits;

a third comparison circuit comprising:

an input connected to said output of said subtractor;

an output; and

means for generating at said output of said third comparison circuit a first signal if said input of said third comparison circuit is within predetermined limits and a second signal if said input of said third comparison circuit is not within predetermined limits;

a decision circuit comprising:

a first input connected to said input of said first comparison circuit;

a second input connected to said input of said second comparison circuit;

a third input connected to said input of said third comparison circuit;

an output; and

means for generating at said output of said decision circuit a third signal if said first, said second, and said third decision circuits have a first signal present and a fourth signal if said first, said second, and said third decision circuits do not all have a first signal present; and

an output terminal connected to said output of said decision circuit.

9. A tone detector according to claim 8 wherein said power circuit comprises:

a first power multiplier circuit comprising:

aa first and second input, both connected to said output of said first low pass filter;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs;

a second power multiplier circuit comprising:

a first and second input, both connected to said output of said second low pass filter;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs; and

a power adder circuit comprising:

a first input connected to said output of said first power multiplier circuit;

a second input connected to said output of said second power multiplier circuit;

an output; and

means for generating an output signal corresponding to the sum of the signals present on said first and said second inputs;

said power frequency product circuit comprises:

a first power frequency product multiplier circuit comprising:

a first input connected to said output of said first differentiator;

a second input connected to said output of said second low pass filter;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs;

a second power frequency product multiplier circuit comprising:

a first input connected to said output of said first low pass filter;

a second input connected to said output of said second differentiator;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs; and

a power frequency product subtractor circuit comprising:

a minuend input connected to said output of said first power frequency product multiplier circuit;

a subtrahend input connected to said output of said second power frequency product multiplier circuit;

an output; and

means for generating an output signal corresponding to the signal present on said minuend input minus the signal on said subtrahend input; and

said bandwidth circuit comprising:

a first bandwidth multiplier circuit comprising:

first and second inputs connected to said output of said first differentiator;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs;

a second bandwidth multiplier circuit comprising:

first and second inputs connected to said output of said second differentiator;

an output; and

means for generating an output signal corresponding to the product of the signals present on said first and said second inputs of said second bandwidth multiplier circuit; and

a bandwidth adder circuit comprising:

a first input connected to said output of said first bandwidth multiplier circuit;

a second input connected to said output of said second bandwidth multiplier circuit;

an output; and

means for generating an output signal corresponding to the sum of the signals present on said first and said second inputs of said bandwidth adder circuit.