Fairfield University School of Engineering
Electrical Engineering Department

COURSE:                  EE331L Analog Electronics II Laboratory - Spring, 2019

INSTRUCTOR:        Jeffrey N. Denenberg

Google Voice:  (203) 513-9427

Office Phone: (203) 254-4000 x3330

Office: BNW 301C

Email:  jeffrey.denenberg@ieee.org

Web: http://doctord.webhop.net/

Lab: BNW 133

INSTRUCTOR ASSISTANCE: Tues-Thurs 5:00 – 6:00 and by phone or email.

CLASS HOURS: 2 hours per week starting at 6:30 pm on Thurs, the lab is available at most times.

COURSE DESCRIPTION: 

This advanced lab provides insight into the functions of various application-specific electronic circuits. Design Projects characterize functioning of various analog systems, such as oscillators, active filters, waveform generation and shaping circuits, and voltage regulator circuits.

PREREQUISITE: EE231L, Analog Electronics Lab I (or equivalent)

CO-REQUISITE: EE 331, “Analog Electronics II” (or equivalent).
            The student should also be able to simulate systems using Multisim (or LTSpice) and MatLab.

COURSE LEARNING OUTCOMES

Learning Outcome

Cognitive Level

ABET Criteria

1.

Students will design electronic circuits to meet specific requirements.

Synthesis

2

2.

Students will develop circuit simulation to test their designs.

Synthesis

2, 6

3.

Students will become proficient at using laboratory instruments.

Analysis

1, 6

4.

Students will reflect on their experimental experiences.

Evaluation

3

5.

Student teams will present their design results to the class for critique.

Evaluation

3, 5

References:

“Microelectronic Circuits”, 7th Edition (2015), Sedra/Smith, ISBN 978-0-19-933913-6, OUP

“Schaum's Outline of Electronic Devices and Circuits”, 2nd Edition (2002), Jimmie J. Cathey, ISBN 0-07-136270-3

SW:     The student should have access to Multisim (or LTSpice) and MatLab

COURSE REQUIREMENTS

The student is expected to attend all of the scheduled classes if for some reason the student cannot make a class the Instructor should be contacted in advance, if possible, to arrange to do and turn in the assigned work and get assignment for following class. The course will include 6 Design exercises. The student is expected to turn in all work on time.

Blackboard

The Blackboard system along with our course web site will be used to manage this course.  Students must submit their assignments into Blackboard for archival and grading.  All work is to be typed (including equations), drawings are to be computer-base, not scanned, hand written work and show derivations for all equations used.

CLASS SCHEDULE AND TOPICS

SESSION

 

 

No.

DATE

TOPIC

References

 

1

1/24

Course Intro: Syllabus, Multisim, Elvis,
Design Projects, Lab 0: PNP Emitter Follower
(Four plus the “Open Design” Final Project)

Multisim Tutorial, Multisim Manual

Lab 6-12 From last semester

 

2

1/31

Design Project 1: A DC Supply

A DC Power Supply

 

3

2/07

Project 1 Testing/Discussion*

 

 

4

2/14

Design Project 2: A Discrete Buffer Amplifier

A Discrete Buffer Amplifier

 

5

2/21

Project 2 Testing/Discussion*

 

 

7

2/28

Design Project 3: A Phase Shift Oscillator

A Phase Shift Oscillator

 

8

3/7

Project 3 Testing/Discussion*

Set Up Final Design Project Teams

Ref.  “Feedback” Chapter 10
Final Design Project

 

9

3/14

Design Project 4:
A Discrete MOSFET Operational Amplifier

A Discrete MOSFET Operational Amplifier

Ref.  “Output stages” Chapter 11

 

3/15

Spring Recess – No Classes

 

 

10

3/28

Project 4 Testing/Discussion*
Establish Final Project Objectives

 

 

11

4/4

Final Design Project Implement/Test

 

 

12

4/11

Final Design Project Implement/Test*

 

 

4/18

Easter Break – No Classes after 4:45 PM

 

 

14

4/25

Final Design Project Presentations

 

 

Reading Days 5/1,2,6 – No Classes

 

 

 

5/3

 

Last Day to Upload Any Materials!

4/19

Final Design Project Presentations

 

 

 

5/3 – 5/9

Final Exam Week

 

* Laboratory Reports are each due and uploaded to Blackboard Thursday afternoon before the next lab assignment begins.

GRADING

Lab 0, Design Projects (4)

10% each

Open Design Project

25%

Laboratory Participation

25%